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Hello everyone in this post am going to tell you about which are the best IOT platforms  are available in the market. Now all big IT company like Google , Amazon, IBM, Alibaba ,HARMAN etc are started IOT services. As of now, all are aware of IOT(  internet of thing s) it is going to change the future.It is one of the hottest topics in the internet and IT industry.All are trying to start the there IOT platforms . Top 10 best IOT platforms  are : IBM bluemix  AWS IOT thingworx Google IOT Cisco iot HP Intel GE PubNub Jasper One of the best and small  IOT platforms is www.particle.io these guys made the IOT as a very easy.  What these   IOT PLATFORMS will do? In   Internet of Things , platforms are there to solving technical challenges or problems for  customers . Those technical challenges might include: - Connectivity hardware (Wi-Fi modules, Bluetooth cellular modules, etc.) - Firmware development tools - Communication protocols (CoAP, MQTT,HTTP) -

What are the differences between a union and a structure in C? A union is a way of providing an alternate way of describing the same memory area. In this way, you could have a struct that contains a union, so that the “static”, or similar portion of the data is described first, and the portion that changes is described by the union. The idea of a union could be handled in a different way by having 2 different structs defined, and making a pointer to each kind of struct. The pointer to struct “a” could be assigned to the value of a buffer, and the pointer to struct “b” could be assigned to the same buffer, but now a->some field and b->some otherfield are both located in the same buffer. That is the idea behind a union. It gives different ways to break down the same buffer area. The difference between structure and union are: 1. union allocates the memory equal to the maximum memory required by the member of the union but structure allocates the memory equal to the total memory

 What are the booting steps for a CPU? The power supply does a self check and sends a power-good signal to the CPU. The CPU starts executing the code stored in ROM on the motherboard starts the address 0xFFFF0. The routines in ROM test the central hardware, search for video ROM, perform a checksum on the video ROM and executes the routines in video ROM. The routines in the mother board ROM then continue searching for any ROM, checksum and executes these routines. After performing the POST (Power On-Self Test) is executed. The system will search for a boot device. Assuming that the valid boot device is found, IO.SYS is loaded into memory and executed. IO.SYS consists primarily of initialization code and extension to the memory board ROM BIOS. MSDOS.SYS is loaded into memory and executed. MSDOS.SYS contains the DOS routines. CONFIG.SYS (created and modified by the user. load additional device drivers for peripheral devices), COMMAND.COM (It is command interpre

What is Interrupt latency? How do you measure interrupt latency? How to reduce the interrupt latency? Answer:  Interrupt latency is the time between interrupt request and execution of the first instruction of the ISR. We need an oscilloscope or a logic state analyser. By entering the interrupt service routine (ISR), you need to activate an available port on your hardware (like a led port or so on) and deactivate it just before returning from the ISR. You can do that by writing the appropriate code. By connecting one input of the oscilloscope (or logic state analyser) to the INTR pin of the microprocessor and the second one to the port you activate/deactivate, you can measure the latency time and the duration of the ISR Causes of interrupt latencies  The first delay is typically in the hardware: The interrupt request signal needs to be synchronised to the CPU clock. Depending on the synchronisation logic, typically up to 3 CPU cycles can be lost before the interrupt request

Difference between Hardware Interrupt and Software Interrupt An interrupt is a special signal that causes the computer’s central processing unit to suspend what it is doing and transfers its control to a special program called an  interrupt handler . The responsibility of an interrupt handler is to determine what caused the interrupt, service the interrupt and then return the control to the point from where the interrupt was caused. The difference between  hardware interrupt  and  software interrupt  is as below: Hardware Interrupt : This interrupt is caused by some external device such as the request to start an I/O or occurrence of a hardware failure. Software Interrupt : This interrupt can be invoked with the help of INT instruction. A programmer triggered this event that immediately stops the execution of the program and passes execution over to the INT handler. The INT handler is usually a part of the operating system and determines the action to be taken e.g. output to t

C-Program CODE #include <p18F4550.h> #include<stdio.h> #include "delayy.h" #include "DS1820.h" #include "serTr.h" #include "VI.h" #define TRUE 1; #define FALSE 0; typedef unsigned char bool; typedef unsigned char uint8; static uint8 ROM_NO[8]; static uint8 LastDiscrepancy; static uint8 LastDeviceFlag; void DS1820(void); void FindDevices(void); uint8 OWFirst(void); uint8 OWSearch(void); void main() { int r; TXSTA = 0x20; // for asynchronous , tx enable settings SPBRG = 18; // for 12mhz baud rate. TXSTAbits.TXEN = 1; RCSTAbits.SPEN = 1; for(r=0;r<10;r++) DS1820_DelayUs(10000); //1sec delay DS1820(); // this function also contains V and I calling functions } /*****************************************/ void DS1820(void) { uint8 rslt, i,j; uint8 All_ROM[5][8]; int r,tem[9]; int cnt;

4.3.4 The Timing Diagrams DS1820 data is read and written through the use of time slots to manipulate bits and a command word to specify the transaction. Write Time Slots: A write time slot is initiated when the host pulls the data line from a high logic level to a low logic level. There are two types of write time slots: Write ‘1’ time slots and Write ‘0’ time slots as shown in fig 4.9. Fig 3.6: Master Write pulse for DS1820 Indications Master Active Low DS1820 Active Low PIC and DS1820 Low Resistor Pull-Up Fig 3.7: Master Read pulse for DS1820 Read Time Slots: The master generates read time slots when data is to be read from the DS1820. The data line must remain at a low logic level for a minimum of one µs to initiate read signal; output data from the DS1820 is valid for 15 µs after the falling edge of the read time slot. The master, therefore, must stop driving the I/O pin low in order to read its state 15 µs from the start of the read slot. By the en